Resistive random access memory (RRAM) devices are widely used in electronic appliances as nonvolatile memory devices due to their many advantages, such as fast read/write access times, a large number of times of read/write operations, long data retention time, small unit area, multi-value storage, and others. The electrical resistance of a resistive random access memory may vary with an applied voltage or current to a bottom electrode, exhibiting a low resistance and a high resistance for storing a logic “0” and a logic “1”.
A resistive random access memory (RRAM) unit generally requires a selector to eliminate the sneak leakage path. An NMOS transistor or a PN diode is generally used as a RRAM selector, which is referred to as a 1T1R or 1D1R structure. The 1T1R structure of the RRAM unit includes a transistor and an RRAM, and the 1D1R structure includes a PN diode and an RRAM. The RRAM selector requires a high SET and RESET current, a small size, a relatively high breakdown voltage, and low leakage current. However, as technology nodes are reduced to 40 nm and below, the 1T1R and 1D1R structures cannot meet these requirements.
A 1D1R structure of a RAM cell is a unipolar/nonpolar cell, however, a conventional RRAM cell is bipolar, that is, it needs to pass a high forward current to implement the SET operation and a high reverse current to implement the RESET operation, however, a diode can only provide a high current in one direction.
Therefore, in order to implement a bipolar RRAM having a high current and a low leakage current, a 2D1R (including two diodes and one RRAM) structure has been proposed for an RRAM memory cell array. A layout design of the 2D1R RRAM memory cell array in a silicon substrate for minimizing the size of the memory cell array structure is one of the technical problems that are currently under study.